AMD Zen 6 to Feature Low-Power Cores for Enhanced Efficiency

AMD is preparing a strategic shift for its Zen 6 processors, incorporating a new type of low-power core similar to Intel's LPE Cores. This development, based on a finding in the Linux kernel and confirmed by an AMD engineer, aims to enhance energy efficiency in low-load tasks, directly addressing market competition in the CPU space.

For years, AMD's Ryzen series successfully challenged Intel's dominance in the central processing unit market. This prompted Intel to increase core counts and frequencies to remain competitive against a revitalized AMD. The competition fueled innovation on both fronts, ultimately benefiting users with more powerful processors.

After several attempts, Intel adopted a hybrid architecture combining high-performance cores with efficiency cores. This strategy allowed Intel to reach up to 24 cores in its CPUs, significantly surpassing the 16 cores of AMD's top processors. However, Lisa Su's company was not surprised by these results but recognized the need to improve efficiency in low-load or idle situations.

Implementing LPE-type low-power cores in Zen 6 makes strategic sense for AMD. This approach ensures that high-performance, high-frequency cores are not activated when not strictly necessary. It is crucial for optimizing energy consumption and battery life, especially in portable devices like laptops.

AMD engineer Vishal Badole stated that this is a new low-power core designed to consume minimal energy when applications/games are in the background or idle.

Information about these new cores was leaked by Phoronix, which discovered x86 topology code in the Linux kernel. This code revealed the existence of Performance cores (related to Zen 6), Efficiency cores (potential future Zen 6C), and the aforementioned low-power cores (LPE-like).

Vishal Badole, an AMD engineer, confirmed that these new cores are designed to consume minimal power when applications or games are running in the background or the system is idle. This feature is fundamental for improving the user experience in laptops and other devices that demand intelligent power management.

Furthermore, Badole mentioned a new Boost system for these high-performance cores. Instead of using the "CPPC_HIGHEST_PERF_PERFORMANCE" command, they will scale using "amd_get_highest_perf()". This suggests a dynamic frequency scaling focused on efficiency rather than a fixed frequency, representing a significant improvement in performance and power management.

These low-power cores are expected to be integrated into the future AMD Medusa Point APU family, designed for laptops. In fact, several months ago, a Zen 6 Medusa Point APU appeared on Geekbench, albeit with performance significantly below expectations, operating at only 2 GHz. This was attributed to it being an early engineering sample, indicating that development is ongoing and substantial improvements are expected in the final version.